Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.
Or split into 4x interest-free payments of 25% on orders over R50
Learn more
Integrated System-Level Modeling of Network-on-Chip Enabled Multi-Processor Platforms first gives a comprehensive update on recent developments in the area of SoC platforms and ESL design methodologies. The main contribution is the rigorous definition of a framework for modeling at the timing approximate level of abstraction. Subsequently this book presents a set of tools for the creation and exploration of timing approximate SoC platform models.
Imprint | Springer-Verlag New York |
Country of origin | United States |
Release date | July 2006 |
Availability | Expected to ship within 12 - 17 working days |
First published | 2006 |
Authors | Tim Kogel, Rainer Leupers, Heinrich Meyr |
Dimensions | 297 x 210 x 14mm (L x W x T) |
Format | Hardcover |
Pages | 186 |
Edition | 2006 ed. |
ISBN-13 | 978-1-4020-4825-8 |
Barcode | 9781402048258 |
Categories | |
LSN | 1-4020-4825-4 |