Offset Reduction Techniques in High-Speed Analog-to-Digital Converters - Analysis, Design and Tradeoffs (Paperback, Softcover reprint of hardcover 1st ed. 2009)

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Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.


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Product Description

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

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Product Details

General

Imprint

Springer

Country of origin

Netherlands

Series

Analog Circuits and Signal Processing

Release date

October 2010

Availability

Expected to ship within 10 - 15 working days

First published

2009

Authors

,

Dimensions

235 x 155 x 21mm (L x W x T)

Format

Paperback

Pages

382

Edition

Softcover reprint of hardcover 1st ed. 2009

ISBN-13

978-90-481-8192-6

Barcode

9789048181926

Categories

LSN

90-481-8192-5



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