Spacer Engineered FinFET Architectures - High-Performance Digital Circuit Applications (Hardcover)

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This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

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Product Description

This book focusses on the spacer engineering aspects of novel MOS-based device-circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

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Product Details

General

Imprint

Productivity Press

Country of origin

United States

Release date

June 2017

Availability

Expected to ship within 12 - 17 working days

First published

2017

Authors

, ,

Dimensions

234 x 156 x 16mm (L x W x T)

Format

Hardcover

Pages

154

ISBN-13

978-1-4987-8359-0

Barcode

9781498783590

Categories

LSN

1-4987-8359-7



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