This book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment.
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This book details timing analysis and optimization techniques for circuits with level-sensitive memory elements. It contains a linear programming formulation applicable to the timing analysis of large scale circuits and includes a delay insertion methodology that improves the efficiency of clock skew scheduling. Coverage also provides a framework for and results from implementing timing optimization algorithms in a parallel computing environment.
Imprint | Springer-Verlag New York |
Country of origin | United States |
Release date | November 2008 |
Availability | Expected to ship within 10 - 15 working days |
First published | 2009 |
Authors | Ivan S. Kourtev, Baris Taskin, Eby G. Friedman |
Dimensions | 235 x 155 x 17mm (L x W x T) |
Format | Hardcover |
Pages | 266 |
Edition | 2009 ed. |
ISBN-13 | 978-0-387-71055-6 |
Barcode | 9780387710556 |
Categories | |
LSN | 0-387-71055-8 |